SOI design
05-09-2016 :: imec Leuven, Belgium

Organizer: imec

This course targets digital and mixed analog/RF SoC designers. The first day by D.Flandre will give an overview of the different PD and FD SOI devices from 1 um (for harsh / HV or sensor applications) to 0.13 for RF and so, and finally 28nm and less, and it will focus upon SOI design issues, The second day by P.Flatresse will focus upon ST FDSOI28 design. 

Program of this course

Day 1: Specificities and potentialities of SOI technologies, devices and circuits 

 
  • Module 1 : Demystifying the wide family and characteristics of SOI technologies and devices for circuit designers . (Basic / historical concepts, names, acronyms, definitions, phenomena, generic advantages / limitations ...)
  • Module 2 : SOI MOSFET specific behaviours, modelling and performance assessment. (floating-body effect, FD-SOI vs FinFET, figures of merit, evolution with technology scaling, operation conditions, self-heating, HV ...)
  • Module 3 : Potential of SOI for high-performance basic digital and analog circuits. (discussion of advantages, limitations, design methods, (harsh) environment impact ... based on examples of logic circuits, analog amplifiers, bandgaps, sensor interfaces, power management...)
  • Module 4 : Benefits of SOI for high-speed / RF device / circuit mixed-signal integration (substrate characteristics, ft / fmax performance, passives, non-linearities, crosstalk, switches, LNA, VCO, optical receivers ...)
Rem : Modules 3 and 4 could be tuned (or re-mixed) according to audience expectations
 
Day 2: Philippe Flatresse (ST Microelectronics):
 
  • Module 1 : FDSOI value proposal
  • Module 2 : FDSOI28 technology
  • Module 3 : Designing with Body biasing – Body bias live demo if I can travel with my board.
  • Module 4 : FDSOI circuit design for High Performance, ULV/ULP, IoT and  Automotive applications and associated benefits.
 










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